Unlocking the Future of Technology: Join the Second Digital India RISC-V Symposium at IIT Madras

Chennai: Rajeev Chandrasekhar, a former Union Minister of State, recently highlighted India’s advancements in the semiconductor and electronics sector. After years of lagging behind, he believes India has significantly revamped its technology landscape.

Chandrasekhar spoke at the Second Digital India RISC-V (DIR-V) Symposium held at the Indian Institute of Technology, Madras (IIT Madras). The symposium took place on March 2 and 3 and was organized in partnership with the Union Ministry of Electronics and Information Technology, RISC-V International, and industry experts.

The DIR-V Symposium 2025 aims to push India toward self-reliance in semiconductor technology, supporting national initiatives like ‘Digital India’ and the ‘India Semiconductor Mission.’ The event brought together a mix of global and Indian experts, startups, and academic leaders to explore recent developments in processor design, open-source hardware, and India’s semiconductor strategy.

Prof. V. Kamakoti, director of IIT Madras, introduced Chandrasekhar, noting his pivotal role in naming the DIR-V initiative and establishing a National Instruction Set Architecture (ISA) for India.

Chandrasekhar expressed excitement about the current technology landscape, describing this time as a remarkable opportunity for India. “For over 25 years, we’ve been following systems and architectures that others created. Now, we can innovate and design our own devices and software,” he said. He emphasized that the technology cycle is speeding up, presenting India with a chance to take a leading role in this evolution.

He added that India has moved from being absent in the semiconductor space to gradually establishing a presence in chip design and manufacturing. “By 2026-27, I’m confident we will have our first 28 nm fab in Gujarat, along with advancements in packaging and innovation,” he stated.

Prof. Kamakoti also highlighted the potential of RISC-V, saying it offers opportunities to create custom architectures for startups, which can lead to effective domain-specific System-on-Chip (SoC) designs. He stressed the importance of developing a microprocessor ecosystem within India.

Key Highlights from the DIR-V Symposium 2025:

• India’s Semiconductor Mission aims to fortify the nation as a global semiconductor hub through local processor development.
• Industry and academia are converging, with discussions and workshops bridging research and product development.
• Innovations in sectors like automotive, AI, IoT, and security were showcased.
• A hackathon featured cutting-edge RISC-V projects in various categories.
• Networking opportunities for startups and investors were provided.

Andrea Gallo, Vice President of Technology at RISC-V International, joined virtually to discuss how RISC-V represents a standard instruction set architecture that fosters collaboration and innovation across industries.

Key Outcomes of DIR-V Symposium 2025:

• Development of policies to enhance India’s semiconductor framework and RISC-V adoption.
• Stronger partnerships between academic institutions and industry for next-gen chip design.
• Roadmap discussions focused on scaling RISC-V processors for commercial and defense uses.
• Encouraging growth among startups in India’s RISC-V semiconductor ecosystem.

IIT Madras’s Role in RISC-V Development:

IIT Madras has been at the forefront of RISC-V research, contributing to the SHAKTI Processor Family, India’s first locally developed RISC-V processor ecosystem. The institute has also established a RISC-V Knowledge Center to promote education and innovation in this field, working closely with industry and government to create secure, high-performance computing solutions.

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IIT MADRAS, SECOND DIGITAL INDIA RISC V, RAJEEV CHANDRASEKHAR, IIT MADRAS SYMPOSIUM, IIT MADRAS HOSTS SECOND DIGITAL INDIA RISC-V (DIR-V) SYMPOSIUM